┌─────────────────────────────────┐
│ Programming the Tseng SVGA Chip │
└─────────────────────────────────┘
Written for the PC-GPE by Mark Feldman
e-mail address : u914097@student.canberra.edu.au
myndale@cairo.anu.edu.au
Please read the file SVGINTRO.TXT
(Graphics/SVGA/Intro PC-GPE menu option)
┌───────────────────────────────────────────┐
│ THIS FILE MAY NOT BE DISTRIBUTED │
│ SEPARATE TO THE ENTIRE PC-GPE COLLECTION. │
└───────────────────────────────────────────┘
┌────────────┬───────────────────────────────────────────────────────────────
│ Disclaimer │
└────────────┘
I assume no responsibility whatsoever for any effect that this file, the
information contained therein or the use thereof has on you, your sanity,
computer, spouse, children, pets or anything else related to you or your
existance. No warranty is provided nor implied with this information.
┌─────────────────────────────────┬──────────────────────────────────────────
│ Identifying the Tseng SVGA Card │
└─────────────────────────────────┘
Tseng Labs have produced two SVGA Chips, the ET3000 and the ET4000.
The Tseng SVGA chips can be identified by attempting to change the
Miscellaneous register as follows:
Index : 06h at port 3C0h
Read/write data from port 3C1h
┌───┬───┬───┬───┬───┬───┬───┬───┐
│ 7 │ 6 │ 5 │ 4 │ 3 │ 2 │ 1 │ 0 │
└───┴───┴───┴───┴───┴───┴───┴───┘
└─┬─┘
High
Output the value 6 to port 3C0h and read a byte from port 3C1h. Modify
the high field in this byte (eg new byte = byte XOR 30h) and write this
new byte to port 3C1h. Read the byte from port 3C1h and see if the byte
was successfully modified, if it was then a Tseng chip is present. Having
done this, write the original byte back to port 3C1h to leave the graphics
adapter in it's original state.
┌─────────────────────────────────────────┬──────────────────────────────────
│ Identifying which Tseng Card is Present │
└─────────────────────────────────────────┘
The ET4000 can be distinguished from the ET3000 by attempting to change the
ET4000 Extended Start Address register as follows:
Index : 33h at port 3D4h
Read/write data from port 3D5h
┌───┬───┬───┬───┬───┬───┬───┬───┐
│ 7 │ 6 │ 5 │ 4 │ 3 │ 2 │ 1 │ 0 │
└───┴───┴───┴───┴───┴───┴───┴───┘
└─┬─┘ └─┬─┘
CAD DAD
The same technique is used as was used to identify the presence of a
Tseng chip, both fields should be modified, written, tested for a successful
write and then restored to their original values. If the change was
successful an ET4000 chip is present, otherwise an ET3000 chip is.
┌──────────────────────────────┬─────────────────────────────────────────────
│ Tseng Graphics Display Modes │
└──────────────────────────────┘
┌─────────────────────────────────────┐
│ Mode Resolution Colors │
├─────────────────────────────────────┤
│ 25h 640x480 16 │
│ 29h 800x600 16 │
│ 2Dh 640x350 256 │
│ 2Eh 640x480 256 │
│ 2Fh 640x400 256 │
│ 30h 800x600 256 │
│ 37h 1024x768 16 │
│ 38h 1024x768 256 │
└─────────────────────────────────────┘
All graphics modes in the above table are supported by the ET4000. I am not
sure which modes are supported by the ET3000.
┌──────────────────────┬─────────────────────────────────────────────────────
│ Tseng Display Memory │
└──────────────────────┘
In my opinion the Tseng memory mapping was designed to prevent graphics
programmers from suffering nervous breakdowns!
Two banks can be mapped to the segment A000:0000-FFFFh, one for
reading and one for writing. The banks can be selected by writing to
the Segment Select Registers at port 3Cdh:
ET3000 Segment Select Register:
Port 3CDh
┌───┬───┬───┬───┬───┬───┬───┬───┐
│ 7 │ 6 │ 5 │ 4 │ 3 │ 2 │ 1 │ 0 │
└───┴───┴───┴───┴───┴───┴───┴───┘
└───┬───┘ └───┬───┘
Read Write
Bank Bank
ET4000 Segment Select Register:
Port 3CDh
┌───┬───┬───┬───┬───┬───┬───┬───┐
│ 7 │ 6 │ 5 │ 4 │ 3 │ 2 │ 1 │ 0 │
└───┴───┴───┴───┴───┴───┴───┴───┘
└─────┬─────┘ └─────┬─────┘
Read Write
Bank Bank
Both of these registers can be read from as well as written to.
Each bank is 64K long, has a 64K granularity and is mapped to host
memory A000:0000-FFFFh.
┌─────────────────────┬──────────────────────────────────────────────────────
│ DPMI and the ET4000 │
└─────────────────────┘
Apparently the ET4000 chip is capable of linear addressing in dos protect-
mode programs. To enable this feature write the value 36h to port 3D4h,
read the value from port 3D5h, set the lower nibble (bits 0 -> 3) to the
value 1 and rewrite the value to port 3D5h. Resetting these bits to the
value 0 puts the chip back in regular segmented addressing mode.
I have no information where or how the entire ET4000 memory would then be
mapped to linear memory. If anyone has more information on this or has a
Tseng card they are willing to try it on let me know.