CLOCKS.TXT

Clock Circuits

Early boards used discrete clock crystals since there typically were only 2-4,
but as newer boards can require more than a dozen frequencies, an integrated
clock circuit is often used.

Another option is to have the clock circuitry on-chip as with the Cirrus Logic
CL-GD54xx series.

VCLK refers to Video Clock and MCLK refers to Memory Clock.


ICS90c61A
Startech ST49c061

20pin mask-programmable combined video and memory frequency generator.
Pins:
   1  i  Reference Clock Input for 14.318MHz reference crystal.
   2  i  Feature Clock Input.
   3  i  External Clock Input.
   4  i  Video Frequency Select bit 0
   5  i  Video Frequency Select bit 1
   6  i  Address Latch Enable. Set low to latch new frequency selectors.
   7  i  VGATTL. Video Frequency Select bit 2.
   8  i  FCLKSEL. If low the Feature Clock Input (pin 2) is used as the video
         clock
   9  i  Memory Frequency Select bit 0.
  10  o  Digital Ground
  11  i  Memory Frequency Select bit 1.
  12  o  Memory Clock Output.
  14  i  Memory Clock Output Enable.
  15  i  Analog Supply Voltage. Single +5V.
  16  o  Analog Ground.
  18  i  Video Clock Output Enable.
  19  o  Video Clock Output.
  20  i  Digital Supply Voltage. Single +5V.

The memory clock is one of four programmed frequencies selected by pins 9 & 11
The video clock is one of eight programmed frequencies selected by pins 4,5
and 7, or the Feature Clock Input (pin2) if pin 8 is low.
The programmed clocks are calculated as: (Reference clock *A)/(B*C)
Where A is 1..127, B is 1..127 and C is 1,2 or 4.

As this chip is mask programmable many versions exist:

ICS90c61A      -PR1     -PR2
ST49c061       -01      -02
Video Clk 0:   REF      REF
Video Clk 1:  16.256   16.108
Video Clk 2:  32.000   32.216
Video Clk 3:  44.900   44.744
Video Clk 4:  25.175   25.057
Video Clk 5:  28.322   28.089
Video Clk 6:  65.000    EXTRN
Video Clk 7:  36.000   36.242
Memory Clk 0: 40.000   41.612
Memory Clk 1: 37.500   37.585
Memory Clk 2: 36.000   36.242
Memory Clk 3: 44.900   44.744



ICS2494
Startech ST49c214
ATI 18811

20pin mask-programmable combined video and memory frequency generator.
Pins:
   1  i  Crystal or external clock input. Usually 14.318MHz
   2  o  Crystal output.
   3  i  External Clock
   4  i  Video Frequency Select bit 0
   5  i  Video Frequency Select bit 1
   6  i  Address Latch Enable. Set high to latch new clock selectors.
   7  i  Video Frequency Select bit 2
   8  i  Video Frequency Select bit 3
   9  i  Memory Frequency Select bit 0
  10  o  Digital and Analog ground
  11  i  Memory Frequency Select bit 1
  12  o  Memory Clock Output.
  13  i  Digital Supply Voltage. Single +5V
  14  o  Digital and Analog ground
  15  i  Analog Supply Voltage. Single +5V
  16  o  Digital and Analog Ground
  17  o  Digital and Analog Ground
  18  o  Buffered Crystal Clock Output Frequency
  19  o  Video Clock Output
  20  i  Digital Supply Voltage. Single +5V


The memory clock is one of four programmed frequencies selected by pins 9 & 11
The video clock is one of sixteen programmed frequencies selected by pins 4,5,
7 and 8. Also the External Clock Input (pin 3) can be used.
The programmed clocks are calculated as: (Reference clock *A)/(B*C)
Where A is 1..127, B is 1..127 and C is 1,2 or 4.

As this chip is mask programmable many versions exist:

ICS2494   -236     -242     -231     -244     -237     -253              -256
ST49c214   -1       -2       -3       -4       -5       -6       -8
VCLK 0:   XTAL    30.000   25.175   20.000   50.350   25.175   25.175   25.175
VCLK 1:  65.028   77.250   28.325   24.000   56.644   28.322   28.322   28.322
VCLK 2:  EXTRN    EXTRN    85.000   32.000   65.000   40.000   40.000     0 ?
VCLK 3:  36.000   80.000   44.900   40.000   72.000   65.000   32.500     0 ?
VCLK 4:  25.175   31.500   40.000   50.000   80.000   44.900   50.000   50.000
VCLK 5:  28.322   36.000   48.000   66.667   89.800   50.000   65.000   77.000
VCLK 6:  24.000   75.000   50.000   80.000   63.000  130.000   38.000   36.000
VCLK 7:  40.000   50.000   81.150  100.000   75.000   75.000   44.900   44.900
VCLK 8:  44.900   40.000   25.175   54.000   25.175   25.175   31.500  130.000
VCLK 9:  50.350   50.000   28.325   70.000   28.322   28.322   36.000  120.000
VCLK A:  16.257   32.000   37.500   90.000   31.500   EXTRN    80.000   80.000
VCLK B:  32.514   44.900   44.900  110.000   36.000   EXTRN    63.000   31.500
VCLK C:  56.644   25.175   40.000   25.000   40.000   60.000   50.000  110.000
VCLK D:  20.000   28.322   32.500   33.333   44.900   80.000  100.000   65.000
VCLK E:  41.539   65.000   50.000   40.000   50.000   EXTRN    76.000   75.000
VCLK F:  80.000   36.000   65.000   50.000   65.000   EXTRN   110.000   72.000
MCLK 0:  32.900   36.000   36.000   16.000   40.000   32.900   70.000
MCLK 1:  35.600   44.347   40.000   24.000   41.612   35.600   63.830
MCLK 2:  43.900   37.500   45.000   50.000   44.744   43.900   60.000
MCLK 3:  49.100   44.773   50.000   66.667   50.000   49.100   81.000


ICS2494   -275     -305              -261
ATI18811                     -0       -1
VCLK 0:  25.175   25.175   42.950  100.000
VCLK 1:  28.322   28.322   48.770  126.000
VCLK 2:  40.000   40.000   92.400   92.400
VCLK 3:    0 ?      0?     36.000   36.000
VCLK 4:  50.000   50.000   50.350   50.350
VCLK 5:  77.000   77.000   56.640   56.640
VCLK 6:  36.000   36.000     0?       0?
VCLK 7:  44.900   44.900   44.900   44.900
VCLK 8: 130.000  130.000   30.240  135.000
VCLK 9: 120.000  120.000   32.000   32.000
VCLK A   80.000   80.000  110.000  110.000
VCLK B:  31.500   31.500   80.000   80.000
VCLK C: 110,000  110.000   39.910   39.910
VCLK D:  65.000   65.000   44.900   44.900
VCLK E:  75.000   75.000   75.000   75.000
VCLK F:  94.500   94.500   65.000   65.000
MCLK 0:
MCLK 1:
MCLK 2:
MCLK 3:





Special version such as the OAK OTI068 and UMC UM9502 exist



ICS1394
Startech ST49c394
Trident TCK900x

20pin mask-programmable video frequency generator.
Pins:
   1  i  Frequency Select bit 3
   2  i  Address Latch Enable. Set high to latch new selectors.
   3  i  Digital Supply Voltage. Single +5V
   4  i  Frequency Select bit 4 or external clock input 1
   5  i  Crystal or external clock input.
   6  o  Crystal output
   7  i  External Clock Input 2
   8  o  Digital Ground
   9  o  Video Clock Output
  12  i  Analog Supply Voltage. Single +5V
  17  o  Analog Ground
  18  i  Frequency Select bit 0
  19  i  Frequency Select bit 1
  20  i  Frequency Select bit 2


The video clock is one of 16 or 32 programmed frequencies selected by pins
18,19,20,1 and possibly 4. If the chip is in 16Also the External Clock Input (pin 3) can be used.
The programmed clocks are calculated as: (Reference clock *A)/(B*C)
Where A is 1..127, B is 1..127 and C is 1,2 or 4.

As this chip is mask programmable many versions exist:

ST49c394   -24      -30
Trident:                    9001     9002      9004
VCLK 0:  25.175   14.318   25.175   25.175   25.275
VCLK 1:  28.322   16.257   28.322   28.322   28.322
VCLK 2:  32.514   FREQ0    44.900   44.900   44.900
VCLK 3:  36.000   32.514   36.000   36 000   36.000
VCLK 4:  40.000   25.175   57.272   57.272   57.272
VCLK 5:  44.900   28.322   65.000   65.000   65.000
VCLK 6:  65.000   24.000   50.350   50.350   50.350
VCLK 7:  84.000   40.000   40.000   40.000   40.000
VCLK 8:  25.175   14.318            88.000   88.000
VCLK 9:  28.322   16.257            98.000   98.000
VCLK A:  40.000   FREQ0            118.800  118.000
VCLK B:  44.900   36.000           108.000  108.000
VCLK C:  32.514   25.175                     72.000
VCLK D:  28.322   28.322                     77.000
VCLK E:  36.000   24.000                     80.000
VCLK F:  65.000   40.000                     75.000
VCLK 10: 25.175   14.318
VCLK 11: 28.322   65.028
VCLK 12: 32.514   FREQ0
VCLK 13: 36.000   36.000
VCLK 14: 40.000   25.175
VCLK 15: 44.900   28.322
VCLK 16: 56.000   24.000
VCLK 17: 65.000   40.000
VCLK 18: 25.175   44.900
VCLK 19: 28.322   50.344
VCLK 1A: 32.514   16.257
VCLK 1B: 40.000   32.514
VCLK 1C: 44.900   56.644
VCLK 1D: 60.000   20.000
VCLK 1E: 80.000   50.000
VCLK 1F: 84.000   80.000



IC Designs ICD2061A
Diamond DCS2824

16 pin user programmable clock generator.
A (typically 14.318 MHz) crystal is connected to pin 6 & 7.
There are two input pins (CLK and DATA) for selecting one of four programmed
clocks and for programming a new clock.

Pins:
   6  ?  Reference Clock
   7  ?  Reference Clock
   ?  i  CLK.  In programming mode this is the "clock" signal to synchronize
         the data stream from the DATA pin.
         In normal mode this is bit 0 of the clock select
   ?  i  DATA. In programming mode this is the data signal.

Command word:
Bit  1-7  m-2. 
     8-9  Divisor. 0: 1, 1: 2, 2: 4, 3: 8
   11-17  n-3.
   18-21  Clock index select. 
   22-23  Register nbr.

The actual clock frequency is calculated as:
  ((((Reference Clock) * n)/m)/divisor

Where n is 3..130, m is 2..129 and the divisor is (1,2,4,8)
Typically the Reference Clock is 14.318MHz

To program a clock value:
    CLK   DATA
     0      0
     0      1

     1      1  !repeat these two 6 times
     0      1  !

     0      0
     1      0
     0      0
     1      0

     1    ~data    ! Repeat for each of 24 bits, starting with
     0    ~data    ! the least significant
     0     data    ! data is the data bit
     1     data    ! ~data is the inverse data bit

     1      1
     0      1
     1      1



Other Clock chips:

MX8602                (Used on MXIC cards)

ICS90c64              (Used on WD90c33 board)

ICS2042ASC            (Used on Compaq QVision)

HM8694P               (Used on HMC cards)