Hualon Microelectronics Corporation

HM86304    512K


Support chips:

HM8694P-304  Clock chip


3C4h index E7h (R/W):
bit   0  Set in interlaced modes
      1  Set in 256c enhanced modes.
      2  In planar modes enables access (both display and read/write) to the
         second bank at $B000 (upper 256K).
      4  Set if 512K, clear if 256K
      6  Clock Select bit 2. Bits 0-1 are in 3CCh bits 2-3.
         Clocks:  0: 25,175, 1: 28.322, 3: 37.2?, 4: 40, 5: 44.9, 7: 65MHz
      7  Clock Select ?

3C4h index E8h (R/W):

3C4h index EDh (R/W):
bit   0  Display Start Address bit 16.

3C4h index EEh (R/W):
bit 4-6  64k bank number

3C4h index EFh (R/W):
bit   5  Sync ??

The Hualon chip appears to use 3C4h index E0h-EFh.


ID Hualon chip set:

if testrg($3C4,$E7) and testrg($3C4,$EE) then
begin
  Hualon HM86304
end;

Video Modes:
20h  T   132   25   16  (8x16)
21h  T   132   44   16  (8x8)
22h  T   132   25   16  (8x14)
28h  G   800  600   16  PL4
29h  G  1024  768   16  PL4   . Interlaced
2Ah  G  1024  768   16  PL4   . Non-interlaced
2Bh  G   640  200  256  P
2Ch  G   640  400  256  P8
2Dh  G   640  480  256  P8
2Eh  G   800  600  256  P8    . (832 bytes per scanline)
31h  G  1024  768    4  PL2     Interlaced
32h  G  1024  768    4  PL2   . Non-interlaced