The PC Vision plus is a framegrabber card.
base+0 (R/W): Control register
bit 0 Zoom. If set pixels are doubled when displayed.
1 Gain Adjust Enable.
If clear the Gain will be incremented or decremented
(depending on the DIR flag in bit 3) by writes to the Gain and
Offset Counter (base+4), if set the Gain is fixed.
2 Offset Adjust Enable.
If clear the Offset Voltage will be incremented or decremented
(depending on the DIR flag in bit 3) by writes to the Gain and
Offset Counter (base+4), if set the Offset Voltage is fixed.
3 Adjust Direction Control.
If set writes to the Gain and Offset Counter (base+4)
will increment the Gain and Offset counters if the appropriate bits
(bit 1 and 2) are clear.
4 Board Select. If set the frame buffer is mapped into PC memory.
5-7 Page select. Selects which of 8 64k pages are mapped in.
base+1 (R/W): Lut Control Register
bit 0-1 Look-Up Table Mode. Selects one of 4 Look Up Table banks
for manipulation.
0= Red LUT, 1= Green LUT, 2= Blue LUT, 3= Input LUT.
2-4 Input Lut Select. Selects one of 8 Input LUTs
5-7 Output Lut Select. Selects one of 8 LUTs for each color.
base+2 (R/W): Lut Address Register
bit 0-7 Offset into the LUT selected by the Lut Control Register (base+1).
Reads and writes to the LUT Data Port (base+3) will go to this entry.
base+3 (R/W): Lut Data Port
bit 0-7 This port directly accesses the offset selected by the Lut Address
Register (base+2) in the LUT selected by the Lut Control Register
(base+1).
base+4 (W): Gain and Offset Counter
bit 0-7 Each write to this register will increment or decrement (depending on
the Direction flag in bit 3 of base+4) the Gain and Offset Voltage
Counters if Adjust is enabled (base+4 bit 1 and 2).
base+5 (R/W): Acquire and Status register
bit 0 Video Input Select. If set video input is taken from Channel 1,
else from Channel 0.
1 Clock Source Select. If set clock source is a Phase-Locked Loop,
else a Crystal Oscillator.
2 (R) Odd/Even Status. Odd field displayed if set.
3 (R) Last Field Status. If clear the PCVISION plus is acquiring
the last field of a grab.
4 (R) Vertical Blank Status.
Vertical Blank active if clear (1.4ms).
5 (R) Horizontal Blank Status.
Horizontal blank active if clear (12.7us).
6-7 Acquire Mode.
0: Freeze. Terminate operation.
1: Clear. Clear video memory.
2: Snap. Acquire a single image.
3: Grab. Continuously acquire images.
When read 0 indicates the system is not busy.
base+6 (R/W): Pan Register
base+7 (R/W): Scroll Register
base+8 (R/W): Memory Access Control Register
base+9 (R/W): Host Mask Register
bit 0-7 Each bit set prevents the corresponding bit plane from changes
during host access and clear operations.
base+Ah (R/W): Video Mask Register
bit 0-7 Each bit set prevents the corresponding bit plane from changes
during acquire operations.
base+Bh (R/W): Pixel Buffer Register